RIGOL: Jitter Decomposition: Finding the Root Cause of Timing Errors – Telonic Instruments Ltd
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RIGOL: Jitter Decomposition: Finding the Root Cause of Timing Errors

Posted on: January 1st, 2026 by Kane Brady

Measuring jitter is only part of the story. To truly understand signal performance, engineers often need to identify where that jitter is coming from.

This application note examines jitter decomposition techniques, allowing engineers to separate total jitter into its underlying components, including Random Jitter (RJ), Deterministic Jitter (DJ), Periodic Jitter (PJ), Duty Cycle Distortion (DCD), and Inter-Symbol Interference (ISI). The document also explains concepts such as the Dual-Dirac model and advanced analysis methods used in modern serial data testing.

For engineers working with high-speed serial interfaces, jitter decomposition provides valuable insight into signal integrity challenges and can significantly accelerate debugging and validation.

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